[PATCH] D149369: [RISCV] Consolidate legality checking for strided load/store [nfc]

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


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Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:11255
   // Get the widened scalar type, e.g. v4i8 -> i64
   unsigned WideScalarBitWidth =
       BaseLdVT.getScalarSizeInBits() * BaseLdVT.getVectorNumElements();
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Is WideScalarBitWidth guaranteed to be a valid MVT? Like can we get i256, i512, i1024, etc. here?


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Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.h:707
+  /// alignment is legal.
+  bool isLegalStridedLoadStore(const DataLayout &DL, Type *DataType, Align Alignment) const;
+
----------------
Exceeds 80 columns I think


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D149369/new/

https://reviews.llvm.org/D149369