[PATCH] D149161: AMDGPU: Fix an assertion in SIOptimizeVGPRLiveRange

[Nicolai Hähnle via Phabricator via llvm-commits]

nhaehnle marked an inline comment as done.
nhaehnle added a comment.

It turns out my LLVM version was a bit old. In current main it needs `-amdgpu-codegenprepare-break-large-phis=false` to reproduce. And I'm adding a severely reduced MIR test.



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Comment at: llvm/lib/Target/AMDGPU/SIOptimizeVGPRLiveRange.cpp:535
       continue;
     }
 
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ruiling wrote:
> arsenm wrote:
> > Could this see an undef subregister def? Should probably be assert !O.readsReg() (or maybe the loop is buggy to begin with by using use_operands?)
> > Could this see an undef subregister def? 
> I guess not in SSA? or could you help point out what it would look like?
> 
> I think the undef use might also appear in blocks after `Endif`, so the assertion on part of the cases may be not quite helpful. As we already checked the register is not live in `Endif`, maybe we can just replace under the check `if (UseMI->isPHI() && UseBlock == Endif)`. But leaving some comment here still useful. 
`!O.readsReg()` seems to make sense, yes.

I found the loop a bit surprising as well, but I'm pretty sure it makes sense due to the way it checks for specific basic blocks (that have previously been collected taking liveness into account).


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https://reviews.llvm.org/D149161