[PATCH] D148096: [AMDGPU][GlobalISel] Widen the vector operand in G_BUILD/INSERT/EXTRACT_VECTOR

[Mateja Marjanovic via Phabricator via llvm-commits]

matejam added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp:237
 
+static LegalityPredicate isNotAnExistingRegClassType(unsigned TypeIdx) {
+  return [=](const LegalityQuery &Query) {
----------------
foad wrote:
> Do we really need this new concept of "RegClassType" in addition to "RegisterType"? I'd really prefer if we can make them the same thing.
I changed it so that the condition is that the type has to be a RegisterType and that it doesn't have a corresponding RegClass.
I can't completely abandon the concept of RegClass, because depending on the existing RegClasses, we widen the vector operand in G_EXTRACT/INSERT_VECTOR_ELT.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D148096/new/

https://reviews.llvm.org/D148096