[PATCH] D148824: AMDGPU: Define sub-class of SGPR_64 for tail call return

Sebastian Neubauer via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Apr 26 01:31:44 PDT 2023


sebastian-ne added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/SIRegisterInfo.td:830
+def Gfx_CCR_SGPR_64 : SIRegisterClass<"AMDGPU", SGPR_64.RegTypes, 32,
+                                (add (trunc (shl SGPR_64, 15), 1), // s[30:31]
+                                     (trunc (shl SGPR_64, 18), 14))> { // s[36:37]-s[s62:63]
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cdevadas wrote:
> @sebastian-ne can you review this part, the gfx scratch SGPRs?
> 
> The rest of the patch LGTM.
Thanks for the fix!

The `s[36:37]-s[s62:63]` range looks good. Why is `s[30:31]` part of `Gfx_CCR_SGPR_64` when it is not part of `CCR_SGPR_64`?


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D148824/new/

https://reviews.llvm.org/D148824



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