[PATCH] D148824: AMDGPU: Define sub-class of SGPR_64 for tail call return
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Apr 25 18:53:45 PDT 2023
arsenm added inline comments.
================
Comment at: llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.td:88-96
def AMDGPUtc_return: SDNode<"AMDGPUISD::TC_RETURN",
SDTypeProfile<0, 3, [SDTCisPtrTy<0>]>,
[SDNPHasChain, SDNPOptInGlue, SDNPVariadic]
>;
+def AMDGPUtc_return_gfx: SDNode<"AMDGPUISD::TC_RETURN_GFX",
+ SDTypeProfile<0, 3, [SDTCisPtrTy<0>]>,
----------------
Could define a common SDTypeProfile and avoid duplicating it between the two
================
Comment at: llvm/lib/Target/AMDGPU/SIInstructions.td:618-643
+def SI_TCRETURN_GFX : SPseudoInstSI <(outs),
+ (ins Gfx_CCR_SGPR_64:$src0, unknown:$callee, i32imm:$fpdiff),
+ [(AMDGPUtc_return_gfx i64:$src0, tglobaladdr:$callee, i32:$fpdiff)]> {
+ let Size = 4;
+ let FixedSize = 1;
+ let isCall = 1;
+ let isTerminator = 1;
----------------
Can use common class to avoid duplication here as well
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D148824/new/
https://reviews.llvm.org/D148824
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