[PATCH] D149024: Restore CodeGen/MachineValueType.h

[NAKAMURA Takumi via Phabricator via llvm-commits]

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This is rework of;

- rG13e77db2df94 <https://reviews.llvm.org/rG13e77db2df94b7b959a4965439f2d994d225d908> (r328395; MVT)

Theoretically, `llvm-tblgen` may depend on `CodeGen` and I have done in this.
But `CodeGen` has many dependencies that are irrelevant to MVT and LLT.
I have proposed D148769 <https://reviews.llvm.org/D148769> to reduce deps.

Besides, I had to isolate MVT and LLT in modmap, since `llvm::PredicateInfo` clashes
between `TableGen/CodeGenSchedule.h` and `Transforms/Utils/PredicateInfo.h`.
(I think better to introduce namespace llvm::Tablegen)

Depends on D148767 <https://reviews.llvm.org/D148767>


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D149024

Files:
  llvm/include/llvm/CodeGen/BasicTTIImpl.h
  llvm/include/llvm/CodeGen/CostTable.h
  llvm/include/llvm/CodeGen/FastISel.h
  llvm/include/llvm/CodeGen/GlobalISel/CallLowering.h
  llvm/include/llvm/CodeGen/LowLevelType.h
  llvm/include/llvm/CodeGen/MachineValueType.h
  llvm/include/llvm/CodeGen/SelectionDAG.h
  llvm/include/llvm/CodeGen/SelectionDAGNodes.h
  llvm/include/llvm/CodeGen/TargetCallingConv.h
  llvm/include/llvm/CodeGen/TargetLowering.h
  llvm/include/llvm/CodeGen/TargetRegisterInfo.h
  llvm/include/llvm/CodeGen/ValueTypes.h
  llvm/include/llvm/Support/MachineValueType.h
  llvm/include/llvm/module.modulemap
  llvm/lib/CodeGen/AggressiveAntiDepBreaker.cpp
  llvm/lib/CodeGen/CodeGenPrepare.cpp
  llvm/lib/CodeGen/MachineScheduler.cpp
  llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
  llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
  llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
  llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
  llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.h
  llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
  llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
  llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
  llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
  llvm/lib/CodeGen/SelectionDAG/StatepointLowering.cpp
  llvm/lib/CodeGen/TargetLoweringBase.cpp
  llvm/lib/CodeGen/TargetRegisterInfo.cpp
  llvm/lib/Target/AArch64/AArch64FastISel.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp
  llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
  llvm/lib/Target/ARM/ARMCallLowering.cpp
  llvm/lib/Target/ARM/ARMFastISel.cpp
  llvm/lib/Target/ARM/ARMISelLowering.cpp
  llvm/lib/Target/ARM/ARMISelLowering.h
  llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
  llvm/lib/Target/Hexagon/HexagonISelLowering.h
  llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
  llvm/lib/Target/Hexagon/HexagonInstrInfo.h
  llvm/lib/Target/Lanai/LanaiISelLowering.cpp
  llvm/lib/Target/M68k/M68kMachineFunction.h
  llvm/lib/Target/Mips/MipsFastISel.cpp
  llvm/lib/Target/Mips/MipsISelLowering.cpp
  llvm/lib/Target/Mips/MipsISelLowering.h
  llvm/lib/Target/Mips/MipsOptimizePICCall.cpp
  llvm/lib/Target/Mips/MipsSEISelLowering.cpp
  llvm/lib/Target/Mips/MipsSEISelLowering.h
  llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
  llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
  llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
  llvm/lib/Target/PowerPC/PPCISelLowering.cpp
  llvm/lib/Target/PowerPC/PPCISelLowering.h
  llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyInstPrinter.h
  llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyTargetStreamer.h
  llvm/lib/Target/WebAssembly/Utils/WebAssemblyTypeUtilities.h
  llvm/lib/Target/X86/X86AsmPrinter.cpp
  llvm/lib/Target/X86/X86CallLowering.cpp
  llvm/lib/Target/X86/X86InterleavedAccess.cpp
  llvm/unittests/CodeGen/ScalableVectorMVTsTest.cpp
  llvm/unittests/Support/MVTTest.cpp
  llvm/utils/TableGen/CodeGenInstruction.h
  llvm/utils/TableGen/CodeGenTarget.h
  llvm/utils/TableGen/DAGISelMatcher.h
  llvm/utils/TableGen/GlobalISelEmitter.cpp
  llvm/utils/TableGen/InfoByHwMode.h
  llvm/utils/TableGen/RegisterInfoEmitter.cpp

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