[PATCH] D148762: [RISCV] Rename some tablegen variables to improve code clarity in the vector load/store instruction definitions

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Apr 21 14:46:20 PDT 2023

Previous message: [PATCH] D148417: [compiler-rt][profiling] Add an incremental buffer writing mode to libprofile
Next message: [PATCH] D148762: [RISCV] Rename some tablegen variables to improve code clarity in the vector load/store instruction definitions
Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]

craig.topper accepted this revision.
craig.topper added a comment.
This revision is now accepted and ready to land.

LGTM


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D148762/new/

https://reviews.llvm.org/D148762

Previous message: [PATCH] D148417: [compiler-rt][profiling] Add an incremental buffer writing mode to libprofile
Next message: [PATCH] D148762: [RISCV] Rename some tablegen variables to improve code clarity in the vector load/store instruction definitions
Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]

More information about the llvm-commits mailing list