[llvm] e1ae0e2 - [AMDGPU] Fix some check prefixes
Jay Foad via llvm-commits
llvm-commits at lists.llvm.org
Wed Apr 19 08:24:44 PDT 2023
Author: Jay Foad
Date: 2023-04-19T16:15:14+01:00
New Revision: e1ae0e2b7db8a3e3e9b67e772dc1b33c95f63e25
URL: https://github.com/llvm/llvm-project/commit/e1ae0e2b7db8a3e3e9b67e772dc1b33c95f63e25
DIFF: https://github.com/llvm/llvm-project/commit/e1ae0e2b7db8a3e3e9b67e772dc1b33c95f63e25.diff
LOG: [AMDGPU] Fix some check prefixes
Added:
Modified:
llvm/test/CodeGen/AMDGPU/bfi_nested.ll
llvm/test/CodeGen/AMDGPU/hazard-inlineasm.mir
llvm/test/CodeGen/AMDGPU/hazard-kill.mir
llvm/test/CodeGen/AMDGPU/noclobber-barrier.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/AMDGPU/bfi_nested.ll b/llvm/test/CodeGen/AMDGPU/bfi_nested.ll
index a43557c80e8c..3383b46e7dd8 100644
--- a/llvm/test/CodeGen/AMDGPU/bfi_nested.ll
+++ b/llvm/test/CodeGen/AMDGPU/bfi_nested.ll
@@ -280,7 +280,7 @@ define float @v_bfi_single_constant_as_partition(float %x, float %y, float %z) {
ret float %result
}
-define amdgpu_kernel void @v_bfi_dont_applied_for_scalar_ops(ptr addrspace(1) %out, i16 %a, i32 %b) {; GFX10-LABEL: v_bfi_not_applied_in_scalar_case:
+define amdgpu_kernel void @v_bfi_dont_applied_for_scalar_ops(ptr addrspace(1) %out, i16 %a, i32 %b) {
; GCN-LABEL: v_bfi_dont_applied_for_scalar_ops:
; GCN: ; %bb.0:
; GCN-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
diff --git a/llvm/test/CodeGen/AMDGPU/hazard-inlineasm.mir b/llvm/test/CodeGen/AMDGPU/hazard-inlineasm.mir
index b5850356cb56..5baaf0d7d6b6 100644
--- a/llvm/test/CodeGen/AMDGPU/hazard-inlineasm.mir
+++ b/llvm/test/CodeGen/AMDGPU/hazard-inlineasm.mir
@@ -6,7 +6,7 @@
...
-# GCN-LABEL: name: hazard-inlineasm
+# CHECK-LABEL: name: hazard-inlineasm
# CHECK: FLAT_STORE_DWORDX4
# CHECK-NEXT: S_NOP 0
# CHECK-NEXT: INLINEASM
diff --git a/llvm/test/CodeGen/AMDGPU/hazard-kill.mir b/llvm/test/CodeGen/AMDGPU/hazard-kill.mir
index ecc0894d707c..822d31886077 100644
--- a/llvm/test/CodeGen/AMDGPU/hazard-kill.mir
+++ b/llvm/test/CodeGen/AMDGPU/hazard-kill.mir
@@ -8,8 +8,8 @@
define amdgpu_ps void @_amdgpu_ps_main() #0 { ret void }
...
---
-# CHECK-LABEL: name: _amdgpu_ps_main
-# CHECK-LABEL: bb.0:
+# GFX90-LABEL: name: _amdgpu_ps_main
+# GFX90-LABEL: bb.0:
# GFX90: $m0 = S_MOV_B32 killed renamable $sgpr4
# GFX90-NEXT: KILL undef renamable $sgpr2
# GFX90-NEXT: S_MOV_B32 0
diff --git a/llvm/test/CodeGen/AMDGPU/noclobber-barrier.ll b/llvm/test/CodeGen/AMDGPU/noclobber-barrier.ll
index 24c27df9dbc7..2d072531088c 100644
--- a/llvm/test/CodeGen/AMDGPU/noclobber-barrier.ll
+++ b/llvm/test/CodeGen/AMDGPU/noclobber-barrier.ll
@@ -543,8 +543,8 @@ entry:
}
; GCN-LABEL: {{^}}no_alias_atomic_rmw_then_clobber:
-; CGN: global_store_dword
-; CGN: global_store_dword
+; GCN: global_store_dword
+; GCN: global_store_dword
; GCN: ds_add_u32
; GCN: global_load_dword
; GCN: global_store_dword
@@ -574,7 +574,7 @@ entry:
}
; GCN-LABEL: {{^}}no_alias_atomic_rmw_then_no_alias_store:
-; CGN: global_store_dword
+; GCN: global_store_dword
; GCN: ds_add_u32
; GCN: s_load_dword s
; GCN-NOT: global_load_dword
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