[PATCH] D148519: [RISCV] Support vector strict rounding operations.

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:2630
+  if (Op.getOpcode() != ISD::STRICT_FNEARBYINT)
+    Truncated = DAG.getNode(RISCVISD::STRICT_SINT_TO_FP_VL, DL,
+                            DAG.getVTList(ContainerVT, MVT::Other), Chain,
----------------
Update the Chain in this if too.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D148519/new/

https://reviews.llvm.org/D148519