[PATCH] D148638: [DAG] Restrict (fp_round (copysign X, Y)) -> (copysign (fp_round X), Y) combine

[Philip Reames via Phabricator via llvm-commits]

reames created this revision.
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This transformation creates an copysign node whose argument types do not match.  RISCV does not handle such a case which results in a crash today.  Looking at the relevant code in DAG, it looks like the process of enabling the non-matching types case was never completed for vectors at all.  The transformation which triggered the RISCV crash is a specialization of another transform (specifically due to one use for profitability) which isn't enabled by default.  Given that, I chose to match the preconditions for that other transform.

Other options here include:

- Updating RISCV codegen to handle the mismatched argument type case for vectors.  This is slightly tricky as I don't see an obvious profitable lowering for this case which doesn't involve simply adding back in the round/trunc.
- Disabling the transform via a target hook.

This patch does involve two changes for AArch64 codegen.  These could be called regressions, but well, the code after actually looks better than the code before.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D148638

Files:
  llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  llvm/test/CodeGen/AArch64/sve-fcopysign.ll
  llvm/test/CodeGen/RISCV/rvv/vfcopysign-sdnode.ll

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