[PATCH] D148317: [RISCV] Remove SEW=8 case for floating point

[Wang Pengcheng via Phabricator via llvm-commits]

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For floating point instructions, SEW won't be 8. So we don't need
to generate scheduling resources for it.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D148317

Files:
  llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
  llvm/lib/Target/RISCV/RISCVScheduleV.td

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