[PATCH] D148229: [DAGCombine][AArch64][CodeGen] Allow 2x bigger vectors than legal for mulh lowering and use SVE's mulh for fixed vector types.

[Dinar Temirbulatov via Phabricator via llvm-commits]

dtemirbulatov created this revision.
dtemirbulatov added reviewers: sdesmalen, david-arm, RKSimon, CarolineConcatto.
Herald added subscribers: ctetreau, ecnelises, hiraditya, kristof.beyls, tschuett.
Herald added a project: All.
dtemirbulatov requested review of this revision.
Herald added a project: LLVM.

Allow 2x bigger vectors than legal for mulh lowering by relying on legalization to spilt combine input/output and use SVE's mulh for fixed vector types.


https://reviews.llvm.org/D148229

Files:
  llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/test/CodeGen/AArch64/sve-fixed-length-int-mulh.ll
  llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-mulh.ll

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