[PATCH] D148117: [AMDGPU] Don't S_MOV_B32 into $scc
Diana Picus via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Apr 12 06:29:00 PDT 2023
rovka updated this revision to Diff 512810.
rovka added a comment.
Addressed the comment. Thanks for the quick review!
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D148117/new/
https://reviews.llvm.org/D148117
Files:
llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
llvm/test/CodeGen/AMDGPU/fold_16bit_imm.mir
llvm/test/CodeGen/AMDGPU/peephole-fold-imm.mir
Index: llvm/test/CodeGen/AMDGPU/peephole-fold-imm.mir
===================================================================
--- llvm/test/CodeGen/AMDGPU/peephole-fold-imm.mir
+++ llvm/test/CodeGen/AMDGPU/peephole-fold-imm.mir
@@ -1,6 +1,51 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=amdgcn--amdhsa -mcpu=gfx908 -verify-machineinstrs -run-pass peephole-opt -o - %s | FileCheck -check-prefix=GCN %s
+---
+name: fold_simm_virtual
+body: |
+ bb.0:
+
+ ; GCN-LABEL: name: fold_simm_virtual
+ ; GCN: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 0
+ ; GCN-NEXT: [[S_MOV_B32_1:%[0-9]+]]:sreg_32 = S_MOV_B32 0
+ ; GCN-NEXT: SI_RETURN_TO_EPILOG
+ %0:sreg_32 = S_MOV_B32 0
+ %1:sreg_32 = COPY killed %0
+ SI_RETURN_TO_EPILOG
+
+...
+
+---
+name: fold_simm_physical
+body: |
+ bb.0:
+
+ ; GCN-LABEL: name: fold_simm_physical
+ ; GCN: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 0
+ ; GCN-NEXT: $sgpr1 = S_MOV_B32 0
+ ; GCN-NEXT: SI_RETURN_TO_EPILOG
+ %0:sreg_32 = S_MOV_B32 0
+ $sgpr1 = COPY killed %0
+ SI_RETURN_TO_EPILOG
+
+...
+
+---
+name: dont_fold_simm_scc
+body: |
+ bb.0:
+
+ ; GCN-LABEL: name: dont_fold_simm_scc
+ ; GCN: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 0
+ ; GCN-NEXT: $scc = COPY killed [[S_MOV_B32_]]
+ ; GCN-NEXT: SI_RETURN_TO_EPILOG
+ %0:sreg_32 = S_MOV_B32 0
+ $scc = COPY killed %0
+ SI_RETURN_TO_EPILOG
+
+...
+
---
name: fold_simm_16_sub_to_lo
body: |
Index: llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
===================================================================
--- llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+++ llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
@@ -3090,7 +3090,12 @@
assert(UseMI.getOperand(1).getReg().isVirtual());
}
- UseMI.setDesc(get(NewOpc));
+ const MCInstrDesc &NewMCID = get(NewOpc);
+ if (DstReg.isPhysical() &&
+ !RI.getRegClass(NewMCID.operands()[0].RegClass)->contains(DstReg))
+ return false;
+
+ UseMI.setDesc(NewMCID);
UseMI.getOperand(1).ChangeToImmediate(Imm.getSExtValue());
UseMI.addImplicitDefUseOperands(*UseMI.getParent()->getParent());
return true;
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D148117.512810.patch
Type: text/x-patch
Size: 2270 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20230412/a5e6b5b9/attachment.bin>
More information about the llvm-commits
mailing list