[PATCH] D148117: [AMDGPU] Don't S_MOV_B32 into $scc
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Apr 12 04:55:32 PDT 2023
arsenm accepted this revision.
arsenm added inline comments.
This revision is now accepted and ready to land.
================
Comment at: llvm/lib/Target/AMDGPU/SIInstrInfo.cpp:3093-3094
+ if (NewOpc == AMDGPU::S_MOV_B32 && DstReg.isPhysical() &&
+ !AMDGPU::SReg_32RegClass.contains(DstReg))
+ return false;
----------------
Can check if the virtual register's class doesn't contain the physical register, don't need to hardcode the opcode/ class
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D148117/new/
https://reviews.llvm.org/D148117
More information about the llvm-commits
mailing list