[PATCH] D141247: [GlobalISelEmitter] handle operand without MVT/class

[ChenZheng via Phabricator via llvm-commits]

shchenz requested review of this revision.
shchenz added a comment.

Request formal review. I saw improvement and degradations for AMDGPU changes, but in general I think we should try to reuse the td file patterns as more as possible?



================
Comment at: llvm/test/CodeGen/AArch64/arm64-vcvt.ll:405
 ;CHECK-NOT: ld1
-;CHECK: fcvtzs d0, d0
-;CHECK-NEXT: ret
+;CHECK: fcvtzs{{.*}}, d0
+;CHECK: ret
----------------
Before the change:
```
remark: <unknown>:0:0: cannot select: %1:gpr(s64) = G_INTRINSIC intrinsic(@llvm.aarch64.neon.fcvtzs), %2:gpr(s64) (in function: fcvtzs_1d_intrinsic)
warning: Instruction selection used fallback path for fcvtzs_1d_intrinsic
```

After the change:
```
	fcvtzs	x8, d0
	fmov	d0, x8
	ret
```

This should be expected as now global-isel are reusing more patterns defined in TD files. But here there is an opportunity to remove the `fmov`?


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D141247/new/

https://reviews.llvm.org/D141247