[PATCH] D147668: [RFC][X86 isel] Remove lane requirement from lowerShuffleAsUNPCKAndPermute

Han Zhu via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Apr 6 11:09:51 PDT 2023


zhuhan0 added inline comments.


================
Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:13307
+               isUndefOrInRange(M, NumElts + Lo, NumElts + Mid) ||
+               isUndefOrInRange(M, Hi, Hi + Mid) ||
+               isUndefOrInRange(M, NumElts + Hi, NumElts + Hi + Mid);
----------------
RKSimon wrote:
> I'm not certain this will work properly for 512-bit vectors? 
The new version should work now.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D147668/new/

https://reviews.llvm.org/D147668



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