[PATCH] D147713: [RISCV] Combine concat_vectors of loads into strided loads

[Luke Lau via Phabricator via llvm-commits]

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If we're concatenating several smaller loads separated by a stride, we
can try and increase the element size and perform a strided load.
For example:

concat_vectors (load v4i8, p+0), (load v4i8, p+n), (load v4i8, p+n*2),
(load v4i8, p+n*3)

>
=

vlse32 p, stride=n, VL=4

This pattern can be produced by the SLP vectorizer.

A special case is when the stride is exactly equal to the width of the
vector, in which case it can be converted into a single consecutive
vector load. For example:

concat_vectors (load v4i8, p), (load v4i8, p+4), (load v4i8, p+8), (load
v4i8, p+12)

>
=

vle8 p, VL=16


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D147713

Files:
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-load-combine.ll

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