[PATCH] D147536: [GlobalISel] Improve stack slot tracking in dbg.values

[Adrian Prantl via Phabricator via llvm-commits]

aprantl added inline comments.


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Comment at: llvm/test/CodeGen/AArch64/GlobalISel/debug-insts.ll:40
   store i32 %in, ptr %addr
-; CHECK: DBG_VALUE %1(p0), $noreg, !17, !DIExpression(DW_OP_deref), debug-location !18
+; CHECK: DBG_VALUE %[[stack_slot]], 0, !17, !DIExpression(), debug-location !18
   call void @llvm.dbg.value(metadata ptr %addr, i64 0, metadata !17, metadata !DIExpression(DW_OP_deref)), !dbg !18
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Can you update the test to not hardcode !17, !18?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D147536/new/

https://reviews.llvm.org/D147536