[PATCH] D147423: [LoongArch] Optimize 32-bit addition with ALSL_W on LoongArch64
Ben Shi via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sun Apr 2 22:20:26 PDT 2023
benshi001 created this revision.
benshi001 added reviewers: SixWeining, xen0n, XiaodongLoong, wangleiat.
Herald added a subscriber: hiraditya.
Herald added a project: All.
benshi001 requested review of this revision.
Herald added subscribers: llvm-commits, jacquesguan.
Herald added a project: LLVM.
Optimize 32-bit 'x+(y<<i)' to (ALSL_W y, x, i) on LoongArch64,
in which 'i' in [1, 2, 3, 4].
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D147423
Files:
llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
llvm/test/CodeGen/LoongArch/ir-instruction/mul.ll
Index: llvm/test/CodeGen/LoongArch/ir-instruction/mul.ll
===================================================================
--- llvm/test/CodeGen/LoongArch/ir-instruction/mul.ll
+++ llvm/test/CodeGen/LoongArch/ir-instruction/mul.ll
@@ -1029,9 +1029,8 @@
;
; LA64-LABEL: mul_i32_4098:
; LA64: # %bb.0:
-; LA64-NEXT: slli.d $a1, $a0, 1
-; LA64-NEXT: slli.d $a0, $a0, 12
-; LA64-NEXT: add.w $a0, $a0, $a1
+; LA64-NEXT: slli.d $a1, $a0, 12
+; LA64-NEXT: alsl.w $a0, $a0, $a1, 1
; LA64-NEXT: ret
%b = mul i32 %a, 4098
ret i32 %b
@@ -1046,9 +1045,8 @@
;
; LA64-LABEL: mul_i32_4100:
; LA64: # %bb.0:
-; LA64-NEXT: slli.d $a1, $a0, 2
-; LA64-NEXT: slli.d $a0, $a0, 12
-; LA64-NEXT: add.w $a0, $a0, $a1
+; LA64-NEXT: slli.d $a1, $a0, 12
+; LA64-NEXT: alsl.w $a0, $a0, $a1, 2
; LA64-NEXT: ret
%b = mul i32 %a, 4100
ret i32 %b
@@ -1063,9 +1061,8 @@
;
; LA64-LABEL: mul_i32_4104:
; LA64: # %bb.0:
-; LA64-NEXT: slli.d $a1, $a0, 3
-; LA64-NEXT: slli.d $a0, $a0, 12
-; LA64-NEXT: add.w $a0, $a0, $a1
+; LA64-NEXT: slli.d $a1, $a0, 12
+; LA64-NEXT: alsl.w $a0, $a0, $a1, 3
; LA64-NEXT: ret
%b = mul i32 %a, 4104
ret i32 %b
@@ -1080,9 +1077,8 @@
;
; LA64-LABEL: mul_i32_4112:
; LA64: # %bb.0:
-; LA64-NEXT: slli.d $a1, $a0, 4
-; LA64-NEXT: slli.d $a0, $a0, 12
-; LA64-NEXT: add.w $a0, $a0, $a1
+; LA64-NEXT: slli.d $a1, $a0, 12
+; LA64-NEXT: alsl.w $a0, $a0, $a1, 4
; LA64-NEXT: ret
%b = mul i32 %a, 4112
ret i32 %b
Index: llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
===================================================================
--- llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
+++ llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
@@ -1075,6 +1075,8 @@
let Predicates = [IsLA64] in {
def : Pat<(add GPR:$rk, (shl GPR:$rj, uimm2_plus1:$imm2)),
(ALSL_D GPR:$rj, GPR:$rk, uimm2_plus1:$imm2)>;
+def : Pat<(sext_inreg (add GPR:$rk, (shl GPR:$rj, uimm2_plus1:$imm2)), i32),
+ (ALSL_W GPR:$rj, GPR:$rk, uimm2_plus1:$imm2)>;
def : Pat<(loongarch_bstrpick (add GPR:$rk, (shl GPR:$rj, uimm2_plus1:$imm2)),
(i64 31), (i64 0)),
(ALSL_WU GPR:$rj, GPR:$rk, uimm2_plus1:$imm2)>;
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