[PATCH] D147322: [AArch64] Improve fshl cost modeling if 3rd arg is constant.

[Dave Green via Phabricator via llvm-commits]

dmgreen added a comment.

Hello. I looks briefly into funnel shifts recently as I had noticed regressions (from a patch that was not in the end committed). Some things I am aware of:

- If both operands are the same then it simplifies to a ror. I don't think that modifies the costs here though.
- An extr with two different operands can be a higher cost instruction. Again I don't think that needs to change the costs though
- For integers less than i32, one of the operands needs to be shifted so that the bits are in the top of the register. So the cost is 1 higher that i32/i64.
- For vectors we should really be generating USHR+SLI, but we don't do that yet.
- I believe everything that applies to fshl in this patch should also equally apply to fshr? So long as the shift amount is const the costs should all be the same.

It is probably worth adding a TODO/FIXME that non-const shifts are not yet added.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D147322/new/

https://reviews.llvm.org/D147322