[PATCH] D147154: [AMDGPU][GlobalISel] Add codegen support for S_INDIRECT_REG_WRITE_MOVREL_B32_V[9|10|11|12]

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


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Comment at: llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-insert-vector-elt.mir:312
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are the vector cases tested for the same sizes?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D147154/new/

https://reviews.llvm.org/D147154