[PATCH] D142231: [AMDGPU][AsmParser] Refine SMRD offset definitions.

[Ivan Kosarev via Phabricator via llvm-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG5114843983b6: [AMDGPU][AsmParser] Refine SMRD offset definitions. (authored by kosarev).

Changed prior to commit:
  https://reviews.llvm.org/D142231?vs=500237&id=509673#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D142231/new/

https://reviews.llvm.org/D142231

Files:
  llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
  llvm/test/MC/AMDGPU/smrd.s


Index: llvm/test/MC/AMDGPU/smrd.s
===================================================================
--- llvm/test/MC/AMDGPU/smrd.s
+++ llvm/test/MC/AMDGPU/smrd.s
@@ -11,6 +11,12 @@
 // Offset Handling
 //===----------------------------------------------------------------------===//
 
+// SP3 requires the immediate offset, but we allow to drop it for
+// compatibility reasons.
+s_load_dword s1, s[2:3]
+// GCN: s_load_dword s1, s[2:3], 0x0 ; encoding: [0x00,0x83,0x00,0xc0]
+// VI: s_load_dword s1, s[2:3], 0x0 ; encoding: [0x41,0x00,0x02,0xc0,0x00,0x00,0x00,0x00]
+
 s_load_dword s1, s[2:3], 0xfc
 // GCN: s_load_dword s1, s[2:3], 0xfc ; encoding: [0xfc,0x83,0x00,0xc0]
 // VI:	s_load_dword s1, s[2:3], 0xfc   ; encoding: [0x41,0x00,0x02,0xc0,0xfc,0x00,0x00,0x00]
Index: llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
===================================================================
--- llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
+++ llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
@@ -1758,7 +1758,6 @@
   AMDGPUOperand::Ptr defaultSMRDOffset8() const;
   AMDGPUOperand::Ptr defaultSMEMOffset() const;
   AMDGPUOperand::Ptr defaultSMEMOffsetMod() const;
-  AMDGPUOperand::Ptr defaultSMRDLiteralOffset() const;
   AMDGPUOperand::Ptr defaultFlatOffset() const;
 
   OperandMatchResultTy parseOModOperand(OperandVector &Operands);
@@ -7970,7 +7969,7 @@
 }
 
 AMDGPUOperand::Ptr AMDGPUAsmParser::defaultSMRDOffset8() const {
-  return AMDGPUOperand::CreateImm(this, 0, SMLoc(), AMDGPUOperand::ImmTyOffset);
+  return AMDGPUOperand::CreateImm(this, 0, SMLoc(), AMDGPUOperand::ImmTyNone);
 }
 
 AMDGPUOperand::Ptr AMDGPUAsmParser::defaultSMEMOffset() const {
@@ -7982,10 +7981,6 @@
                                   AMDGPUOperand::ImmTySMEMOffsetMod);
 }
 
-AMDGPUOperand::Ptr AMDGPUAsmParser::defaultSMRDLiteralOffset() const {
-  return AMDGPUOperand::CreateImm(this, 0, SMLoc(), AMDGPUOperand::ImmTyOffset);
-}
-
 AMDGPUOperand::Ptr AMDGPUAsmParser::defaultFlatOffset() const {
   return AMDGPUOperand::CreateImm(this, 0, SMLoc(), AMDGPUOperand::ImmTyOffset);
 }


-------------- next part --------------
A non-text attachment was scrubbed...
Name: D142231.509673.patch
Type: text/x-patch
Size: 2091 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20230330/d615e6a4/attachment.bin>