[PATCH] D147167: [TwoAddressInstruction] Improve tests for register killed by instruction

[Jay Foad via Phabricator via llvm-commits]

foad created this revision.
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Define and use a MachineOperand overload of isPlainlyKilled. This
improves codegen in a couple of tests because it catches the case where
MO does not kill Reg but another operand of the same instruction does.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D147167

Files:
  llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
  llvm/test/CodeGen/AArch64/sve-fixed-length-limit-duplane.ll
  llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-limit-duplane.ll
  llvm/test/CodeGen/AMDGPU/mad-mix-lo.ll
  llvm/test/CodeGen/AVR/shift32.ll
  llvm/test/CodeGen/X86/pr32284.ll

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