[PATCH] D147041: [CodeGen] Remove redundent instructions generated by combineAddrModes.

[Peter Rong via Phabricator via llvm-commits]

Peter created this revision.
Herald added subscribers: pengfei, hiraditya.
Herald added a project: All.
Peter requested review of this revision.
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.

CodeGenPare may optimize memory access by combine some of them.
During such optimization, some placeholder instructions may be generated (`AddressingModeCombiner::InsertPlaceholders`)
If the optimization failed, the generated placeholder is not removed.

Normally this won't be a problem as deadcode will be eliminated anyway.
However, in this case (Issue 58538), the generated instruction may trigger an infinate loop.
The infinate loop involves `sinkCmpExpression`, where it tries to put Cmp Inst to the user's block.
(See the test case detailed in the issue)

To fix this, we would remove the unnecessary placeholder immediately when we find the optimization fails.
This patch fixes https://github.com/llvm/llvm-project/issues/58538, a test is also included.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D147041

Files:
  llvm/lib/CodeGen/CodeGenPrepare.cpp
  llvm/test/CodeGen/X86/pr58538.ll


Index: llvm/test/CodeGen/X86/pr58538.ll
===================================================================
--- /dev/null
+++ llvm/test/CodeGen/X86/pr58538.ll
@@ -0,0 +1,29 @@
+; RUN: opt -codegenprepare -mtriple=x86_64 %s -S -o - | FileCheck %s
+; RUN: opt -codegenprepare -mtriple=i386 %s -S -o - | FileCheck %s
+
+define i32 @f(i32 %0) {
+; CHECK-LABEL: @f
+; CHECK: BB:
+; CHECK:   %P0 = alloca i32, i32 8, align 4
+; CHECK:   %P1 = getelementptr i32, ptr %P0, i32 1
+; CHECK:   %1 = icmp eq i32 %0, 0
+; CHECK:   %P2 = getelementptr i1, ptr %P1, i1 %1
+; CHECK:   %2 = icmp eq i32 %0, 0
+; CHECK:   %P3 = select i1 %2, ptr %P1, ptr %P2
+; CHECK:   %L1 = load i32, ptr %P3, align 4
+; CHECK:   ret i32 %L1
+BB:
+  %P0 = alloca i32, i32 8
+  %P1 = getelementptr i32, ptr %P0, i32 1
+  %B0 = icmp eq i32 %0, 0
+  br label %BB1
+
+BB1:                                              ; preds = %BB1, %BB
+  %P2 = getelementptr i1, ptr %P1, i1 %B0
+  br i1 false, label %BB1, label %BB2
+
+BB2:                                              ; preds = %BB1
+  %P3 = select i1 %B0, ptr %P1, ptr %P2
+  %L1 = load i32, ptr %P3
+  ret i32 %L1
+}
Index: llvm/lib/CodeGen/CodeGenPrepare.cpp
===================================================================
--- llvm/lib/CodeGen/CodeGenPrepare.cpp
+++ llvm/lib/CodeGen/CodeGenPrepare.cpp
@@ -3574,6 +3574,9 @@
   /// Original Address.
   Value *Original;
 
+  /// Common value among addresses
+  Value *CommonValue = nullptr;
+
 public:
   AddressingModeCombiner(const SimplifyQuery &_SQ, Value *OriginalValue)
       : SQ(_SQ), Original(OriginalValue) {}
@@ -3662,12 +3665,18 @@
     if (!initializeMap(Map))
       return false;
 
-    Value *CommonValue = findCommon(Map);
+    CommonValue = findCommon(Map);
     if (CommonValue)
       AddrModes[0].SetCombinedField(DifferentField, CommonValue, AddrModes);
     return CommonValue != nullptr;
   }
 
+  void eraseCommonValue() {
+    if (CommonValue && CommonValue->getNumUses() == 0)
+      if (Instruction *CommonInst = dyn_cast<Instruction>(CommonValue))
+        CommonInst->eraseFromParent();
+  }
+
 private:
   /// Initialize Map with anchor values. For address seen
   /// we set the value of different field saw in this address.
@@ -5378,8 +5387,10 @@
     if (AddrMode.Scale) {
       Type *ScaledRegTy = AddrMode.ScaledReg->getType();
       if (cast<IntegerType>(IntPtrTy)->getBitWidth() >
-          cast<IntegerType>(ScaledRegTy)->getBitWidth())
+          cast<IntegerType>(ScaledRegTy)->getBitWidth()) {
+        AddrModes.eraseCommonValue();
         return Modified;
+      }
     }
 
     if (AddrMode.BaseGV) {


-------------- next part --------------
A non-text attachment was scrubbed...
Name: D147041.508967.patch
Type: text/x-patch
Size: 2627 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20230328/212f25d3/attachment.bin>