[llvm] 4fde20b - foo

[Philip Reames via llvm-commits]

This looks like an accidental commit.

Philip

On 3/27/23 10:40, Craig Topper via llvm-commits wrote:
> Author: Craig Topper
> Date: 2023-03-27T10:06:34-07:00
> New Revision: 4fde20b8a62ed3d850e4e770ae640039ca1a9ed8
>
> URL: https://github.com/llvm/llvm-project/commit/4fde20b8a62ed3d850e4e770ae640039ca1a9ed8
> DIFF: https://github.com/llvm/llvm-project/commit/4fde20b8a62ed3d850e4e770ae640039ca1a9ed8.diff
>
> LOG: foo
>
> Added:
>      
>
> Modified:
>      llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
>      llvm/test/MC/RISCV/insn-invalid.s
>
> Removed:
>      
>
>
> ################################################################################
> diff  --git a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
> index 07728c7c2d130..108ecf806c6f0 100644
> --- a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
> +++ b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
> @@ -1505,7 +1505,7 @@ RISCVAsmParser::parseInsnDirectiveOpcode(OperandVector &Operands) {
>       auto *CE = dyn_cast<MCConstantExpr>(Res);
>       if (CE) {
>         int64_t Imm = CE->getValue();
> -      if (isUInt<7>(Imm) && (Imm & 3) == 3) {
> +      if (isUInt<7>(Imm)) {
>           Operands.push_back(RISCVOperand::createImm(Res, S, E, isRV64()));
>           return MatchOperand_Success;
>         }
> @@ -1534,8 +1534,8 @@ RISCVAsmParser::parseInsnDirectiveOpcode(OperandVector &Operands) {
>       break;
>     }
>   
> -  Error(S, "opcode must be in the range [0, 127] and the lower 2 bits must be "
> -           "0x3");
> +  Error(S, "opcode must be a valid opcode name or an immediate in the range "
> +           "[0, 127]");
>     return MatchOperand_ParseFail;
>   }
>   
>
> diff  --git a/llvm/test/MC/RISCV/insn-invalid.s b/llvm/test/MC/RISCV/insn-invalid.s
> index ab41f07ef567f..82fdd7b579eaf 100644
> --- a/llvm/test/MC/RISCV/insn-invalid.s
> +++ b/llvm/test/MC/RISCV/insn-invalid.s
> @@ -14,8 +14,7 @@
>   .insn q  0x13,  0,  a0, a1, 13, 14 # CHECK: :[[@LINE]]:7: error: invalid instruction format
>   
>   # Invalid immediate
> -.insn i  0x99,  0, a0, 4(a1) # CHECK: :[[@LINE]]:10: error: opcode must be in the range [0, 127] and the lower 2 bits must be 0x3
> -.insn i  0,  0, a0, 4(a1) # CHECK: :[[@LINE]]:10: error: opcode must be in the range [0, 127] and the lower 2 bits must be 0x3
> +.insn i  0x99,  0, a0, 4(a1) # CHECK: :[[@LINE]]:10: error: opcode must be in the range [0, 127]
>   .insn r  0x33,  8,  0, a0, a1, a2 # CHECK: :[[@LINE]]:17: error: immediate must be an integer in the range [0, 7]
>   .insn r4 0x43,  0,  4, fa0, fa1, fa2, fa3 # CHECK: :[[@LINE]]:21: error: immediate must be an integer in the range [0, 3]
>   
>
>
>          
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