[PATCH] D145301: Add more efficient vector bitcast for AArch64

[Markus Everling via Phabricator via llvm-commits]

Sp00ph added a comment.

In D145301#4221481 <https://reviews.llvm.org/D145301#4221481>, @lawben wrote:

> If we have a comparison, we know that all bits are 1 or all bits a 0, so if the least significant one is equal to all others.

Aren't the elements in a `<N x i1>` guaranteed to be 0 or -1 (so all zeros or all ones) anyways? And even if there was always an extra instruction emitted so that for compare + bitcast the flow would look like this: `<initial compare> -> <compare returned bitmask> -> <use and-trick on the result of that>`, I would assume that LLVM would just trivially optimize out the second compare if it knows that the result of the first compare already contains all zeros/all ones.


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https://reviews.llvm.org/D145301