[PATCH] D146835: [RISCV] Enable usubo formation in CodeGenPrepare.

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.h:496
                             bool MathUsed) const override {
     if (VT == MVT::i8 || VT == MVT::i16)
       return false;
----------------
reames wrote:
> Should this maybe be checking that VT is legal?  Forming a 64 bit op on RV32 or a 32 bit op on RV64 seems slightly suspect.
We seem to do ok with W instructions for i32 on RV64.

For i64 on RV32, there was a proposed patch that disabled it, but then required other patches. I applied a couple patches to type legalization for uaddo and add that fixed the motivating case. I haven't seen evidence of other problems yet.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D146835/new/

https://reviews.llvm.org/D146835