[PATCH] D146735: [CodeGen] Don't include aliases in RegisterClassInfo::IgnoreCSRForAllocOrder

[Jay Foad via Phabricator via llvm-commits]

foad added a comment.

This code was introduced in D126565 <https://reviews.llvm.org/D126565> with no tests. I don't understand what it could mean for STI.ignoreCSRForAllocationOrder to return different results for registers that alias, so I hope it is sufficient to call it only on the registers that are directly specified in the CSR list.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D146735/new/

https://reviews.llvm.org/D146735