[PATCH] D146734: [CodeGen] Use RegUnits in RegisterClassInfo::getLastCalleeSavedAlias

Jay Foad via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Mar 23 09:49:33 PDT 2023


foad created this revision.
foad added reviewers: qcolombet, MatzeB.
Herald added subscribers: kosarev, jeroen.dobbelaere, StephenFan, hiraditya, tpr.
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foad requested review of this revision.
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Change the implementation of getLastCalleeSavedAlias to use RegUnits
instead of register aliases. This is much faster on targets like AMDGPU
which define a very large number of overlapping register tuples.

No functional change intended. If PhysReg overlaps multiple CSRs then
getLastCalleeSavedAlias(PhysReg) could conceivably return a different
arbitrary one, but currently it is only used for some debug printing
anyway.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D146734

Files:
  llvm/include/llvm/CodeGen/RegisterClassInfo.h
  llvm/lib/CodeGen/RegisterClassInfo.cpp


Index: llvm/lib/CodeGen/RegisterClassInfo.cpp
===================================================================
--- llvm/lib/CodeGen/RegisterClassInfo.cpp
+++ llvm/lib/CodeGen/RegisterClassInfo.cpp
@@ -80,10 +80,10 @@
     LastCalleeSavedRegs.clear();
     // Build a CSRAlias map. Every CSR alias saves the last
     // overlapping CSR.
-    CalleeSavedAliases.assign(TRI->getNumRegs(), 0);
+    CalleeSavedAliases.assign(TRI->getNumRegUnits(), 0);
     for (const MCPhysReg *I = CSR; *I; ++I) {
-      for (MCRegAliasIterator AI(*I, TRI, true); AI.isValid(); ++AI)
-        CalleeSavedAliases[*AI] = *I;
+      for (MCRegUnitIterator UI(*I, TRI); UI.isValid(); ++UI)
+        CalleeSavedAliases[*UI] = *I;
       LastCalleeSavedRegs.push_back(*I);
     }
 
@@ -150,7 +150,7 @@
     uint8_t Cost = RegCosts[PhysReg];
     MinCost = std::min(MinCost, Cost);
 
-    if (CalleeSavedAliases[PhysReg] &&
+    if (getLastCalleeSavedAlias(PhysReg) &&
         !STI.ignoreCSRForAllocationOrder(*MF, PhysReg))
       // PhysReg aliases a CSR, save it for later.
       CSRAlias.push_back(PhysReg);
Index: llvm/include/llvm/CodeGen/RegisterClassInfo.h
===================================================================
--- llvm/include/llvm/CodeGen/RegisterClassInfo.h
+++ llvm/include/llvm/CodeGen/RegisterClassInfo.h
@@ -56,7 +56,7 @@
   // Used only to determine if an update for CalleeSavedAliases is necessary.
   SmallVector<MCPhysReg, 16> LastCalleeSavedRegs;
 
-  // Map register alias to the callee saved Register.
+  // Map regunit to the callee saved Register.
   SmallVector<MCPhysReg, 4> CalleeSavedAliases;
 
   // Indicate if a specified callee saved register be in the allocation order
@@ -113,12 +113,16 @@
   }
 
   /// getLastCalleeSavedAlias - Returns the last callee saved register that
-  /// overlaps PhysReg, or NoRegister if Reg doesn't overlap a
+  /// overlaps PhysReg, or NoRegister if PhysReg doesn't overlap a
   /// CalleeSavedAliases.
   MCRegister getLastCalleeSavedAlias(MCRegister PhysReg) const {
-    if (PhysReg.id() < CalleeSavedAliases.size())
-      return CalleeSavedAliases[PhysReg];
-    return MCRegister::NoRegister;
+    MCRegister CSR;
+    for (MCRegUnitIterator UI(PhysReg, TRI); UI.isValid(); ++UI) {
+      CSR = CalleeSavedAliases[*UI];
+      if (CSR)
+        break;
+    }
+    return CSR;
   }
 
   /// Get the minimum register cost in RC's allocation order.


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