[PATCH] D134893: [LSR][TTI][RISCV] Add isAllowTerminatingConditionFoldingAfterLSR into TTI and enable it for RISC-V

[Yueh-Ting (eop) Chen via Phabricator via llvm-commits]

eopXD added a subscriber: fhahn.
eopXD added a comment.

I agree with @fhahn that such hook to a middle-end optimization like LSR is not a great approach. I have generally improving LSR term-fold and default enabling it as an item to my queue. I have the RVV intrinsics to be dealt with first but this will be the first thing I'll revisit once I am done there.

If there is no further comments I will drop this patch later this week.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D134893/new/

https://reviews.llvm.org/D134893