[PATCH] D146438: [RISCV][MC] Refine MCInstrAnalysis based on registers used

[Wang Pengcheng via Phabricator via llvm-commits]

pcwang-thead added a comment.

Thanks! I think it's should be helpful. And I just have some questions.



================
Comment at: llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp:168
+    case RISCV::JALR:
+      return Inst.getOperand(0).getReg() == RISCV::X1;
+    }
----------------
What about `call t0, OUTLINED_FUNCTION` where register is `RISCV::X5`?


================
Comment at: llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp:180
+    case RISCV::JALR:
+      return Inst.getOperand(0).getReg() == RISCV::X0 &&
+             Inst.getOperand(1).getReg() == RISCV::X1;
----------------
What about `jalr x0, x5` which is used in outlined function?


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  https://reviews.llvm.org/D146438/new/

https://reviews.llvm.org/D146438