[PATCH] D146438: [RISCV][MC] Refine MCInstrAnalysis based on registers used

[Job Noorman via Phabricator via llvm-commits]

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MCInstrAnalysis provides a number of methods to query properties of
instructions (e.g., isTerminator(), isCall(),...). The default
implementation of these methods forwards the query to MCInstrDesc which
returns information based on various RISCVInstrInfo*.td files.

Since the info in MCInstrDesc is based on opcodes only, it is often
quite inaccurate. For example, JAL/JALR are never recognized as
terminators or branches while they certainly can be. However,
MCInstrAnalysis has access to the full MCInst so can improve accuracy by
inspecting registers used by the instruction.

This patch refines the following MCInstrAnalysis methods:

- isTerminator: JAL/JALR with RD=X0;
- isCall: JAL/JALR with RD=X1
- isReturn: JALR/C_JR with RD=X0, RS1=X1
- isBranch: JAL/JALR with RD=X0;
- isIndirectBranch: JALR with RD=X0;

Note that the reason for this patch is to simplify the RISCV target in
BOLT. While it's possible to implement everything there, it seems more
logical to implement it directly in the RISCV backend as other tools
might also be able to benefit from it.


https://reviews.llvm.org/D146438

Files:
  llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp
  llvm/unittests/Target/RISCV/CMakeLists.txt
  llvm/unittests/Target/RISCV/MCInstrAnalysisTest.cpp

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