[llvm] 101cf0b - [RISCV] Add isReMaterializable to FLI instructions.

[Craig Topper via llvm-commits]

Author: Craig Topper
Date: 2023-03-17T12:16:37-07:00
New Revision: 101cf0b8ab82d01f220b695a6edef3e5ec4b1221

URL: https://github.com/llvm/llvm-project/commit/101cf0b8ab82d01f220b695a6edef3e5ec4b1221
DIFF: https://github.com/llvm/llvm-project/commit/101cf0b8ab82d01f220b695a6edef3e5ec4b1221.diff

LOG: [RISCV] Add isReMaterializable to FLI instructions.

Reviewed By: reames

Differential Revision: https://reviews.llvm.org/D146321

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVInstrInfoZfa.td
    llvm/test/CodeGen/RISCV/float-zfa.ll

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/RISCV/RISCVInstrInfoZfa.td b/llvm/lib/Target/RISCV/RISCVInstrInfoZfa.td
index 03f2292a571e..28348b14a5ef 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfoZfa.td
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfoZfa.td
@@ -93,7 +93,7 @@ class FPUnaryOp_r_rtz<bits<7> funct7, bits<5> rs2val, DAGOperand rdty,
 //===----------------------------------------------------------------------===//
 
 let Predicates = [HasStdExtZfa] in {
-let isAsCheapAsAMove = 1 in
+let isReMaterializable = 1, isAsCheapAsAMove = 1 in
 def FLI_S : FPUnaryOp_imm<0b1111000, 0b00001, 0b000, OPC_OP_FP, (outs FPR32:$rd),
             (ins loadfp32imm:$imm), "fli.s", "$rd, $imm">;
 
@@ -108,7 +108,7 @@ def FLEQ_S : FPCmp_rr<0b1010000, 0b100, "fleq.s", FPR32>;
 } // Predicates = [HasStdExtZfa]
 
 let Predicates = [HasStdExtZfa, HasStdExtD] in {
-let isAsCheapAsAMove = 1 in
+let isReMaterializable = 1, isAsCheapAsAMove = 1 in
 def FLI_D : FPUnaryOp_imm<0b1111001, 0b00001, 0b000, OPC_OP_FP, (outs FPR64:$rd),
             (ins loadfp64imm:$imm), "fli.d", "$rd, $imm">;
 
@@ -138,7 +138,7 @@ def FMV_X_W_FPR64 : FPUnaryOp_r<0b1110000, 0b00000, 0b000, GPR, FPR64,
 } // Predicates = [HasStdExtZfa, HasStdExtD, IsRV32]
 
 let Predicates = [HasStdExtZfa, HasStdExtZfhOrZvfh] in
-let isAsCheapAsAMove = 1 in
+let isReMaterializable = 1, isAsCheapAsAMove = 1 in
 def FLI_H : FPUnaryOp_imm<0b1111010, 0b00001, 0b000, OPC_OP_FP, (outs FPR16:$rd),
             (ins loadfp16imm:$imm), "fli.h", "$rd, $imm">;
 

diff  --git a/llvm/test/CodeGen/RISCV/float-zfa.ll b/llvm/test/CodeGen/RISCV/float-zfa.ll
index f6066041be3f..e56ab8c9107f 100644
--- a/llvm/test/CodeGen/RISCV/float-zfa.ll
+++ b/llvm/test/CodeGen/RISCV/float-zfa.ll
@@ -227,3 +227,16 @@ define i32 @fcmp_ueq_q(float %a, float %b) nounwind strictfp {
   %2 = zext i1 %1 to i32
   ret i32 %2
 }
+
+declare void @foo(float, float)
+
+; Make sure we use two fli instructions instead of copying.
+define void @fli_remat() {
+; CHECK-LABEL: fli_remat:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    fli.s fa0, 1.0
+; CHECK-NEXT:    fli.s fa1, 1.0
+; CHECK-NEXT:    tail foo at plt
+  tail call void @foo(float 1.000000e+00, float 1.000000e+00)
+  ret void
+}