[PATCH] D146313: [AMDGPU] Simplify SMEM Real instruction definitions. NFC.
Jay Foad via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Mar 17 11:09:48 PDT 2023
foad added inline comments.
================
Comment at: llvm/lib/Target/AMDGPU/SMInstructions.td:973
: SMEM_Real_gfx10<op, !cast<SM_Pseudo>(ps # offsets.Variant)> {
- RegisterClass BaseClass = !cast<SM_Load_Pseudo>(ps # offsets.Variant).BaseClass;
- let InOperandList = !con((ins BaseClass:$sbase), offsets.Ins, (ins CPol:$cpol));
}
----------------
kosarev wrote:
> Looks like no need for the curly braces anymore?
Thanks - fixed in ac62e7b6cb450c1d36807f49b51f5e748764b49d
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D146313/new/
https://reviews.llvm.org/D146313
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