[PATCH] D141560: [RISCV][CodeGen] Add codegen pattern for FLI instruction in experimental zfa extension

[Craig Topper via Phabricator via llvm-commits]

craig.topper added a comment.

In D141560#4198220 <https://reviews.llvm.org/D141560#4198220>, @joshua-arch1 wrote:

> Anyone knows how to generate FLI from C-code? If I compile the following program, I cannot get FlI. ConstantFP will be converted to Constant in DAG.
>
>   void foo_double64 ()
>   {
>     volatile double a;
>     a = 0.0625;
>   }

You just need to use it to some floating point arithmetic

  void foo_double64 (double x)
  {
    volatile double a;
    a = x + 0.0625;
  }

or return a floating point value

  double foo_double64 ()
  {
    return 0.0625;
  }



================
Comment at: llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp:849
+          (VT == MVT::f32 && RISCVLoadFPImm::getLoadFP32Imm(APF) != -1 && 
+           !APF.isPosZero()))
+        break;
----------------
joshua-arch1 wrote:
> craig.topper wrote:
> > Why was this isPosZero check added? It wasn't there when the patch was approved.
> Just in order to make sure loading +0.0 will not use fli.s.
But why treat fli.s different than fli.h or fli.d?


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