[PATCH] D146129: [Target][RISCV] Fix inconsistent naming of Predicates (NFCI).

[Alex Bradbury via Phabricator via llvm-commits]

asb added a comment.

Thanks for making this suggestion.

The suggested renaming would be consistent with those other predicates, but RV{32,64}{I,E} are different base ISAs while the other predicates refer to instruction set extensions. Because of this logical distinction IsRV32/IsRV64 make more sense to me at least.

It's a bit less clear for RVE given the way me model it within LLVM is somewhat like as if it was an instruction set extension. Though I still think I personally prefer `IsRVE` for that case.


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  https://reviews.llvm.org/D146129/new/

https://reviews.llvm.org/D146129