[PATCH] D145939: [DAG] Fold multiple insert_vector_elt of zero values into an AND mask

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon created this revision.
RKSimon added reviewers: dmgreen, pengfei, goldstein.w.n.
Herald added subscribers: ctetreau, ecnelises, hiraditya, kristof.beyls.
Herald added a project: All.
RKSimon requested review of this revision.
Herald added a project: LLVM.

This also allows us to make use of the existing isVectorClearMaskLegal shuffle canonicalization


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D145939

Files:
  llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  llvm/test/CodeGen/AArch64/neon-dotreduce.ll
  llvm/test/CodeGen/AArch64/vecreduce-add-legalization.ll
  llvm/test/CodeGen/AArch64/vecreduce-umax-legalization.ll
  llvm/test/CodeGen/X86/clear_upper_vector_element_bits.ll
  llvm/test/CodeGen/X86/insertelement-zero.ll

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