[PATCH] D145155: [RISCV] Enable interleaved access vectorization

[Luke Lau via Phabricator via llvm-commits]

luke updated this revision to Diff 504582.
luke added a comment.
Herald added a subscriber: jobnoorman.

Update zvl32b test case


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D145155/new/

https://reviews.llvm.org/D145155

Files:
  llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
  llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
  llvm/test/Transforms/LoopVectorize/RISCV/interleaved-accesses.ll
  llvm/test/Transforms/LoopVectorize/RISCV/interleaved-cost.ll
  llvm/test/Transforms/LoopVectorize/RISCV/zvl32b.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D145155.504582.patch
Type: text/x-patch
Size: 30666 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20230313/397b0924/attachment.bin>