[PATCH] D145697: [RISCV][NFC] Add tests for interleaved accesses in loop vectorizer

[Luke Lau via Phabricator via llvm-commits]

luke added inline comments.


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Comment at: llvm/test/Transforms/LoopVectorize/RISCV/interleaved-accesses-zve32x.ll:32
+
+  %offset0 = shl i64 %i, 1
+  %q0 = getelementptr i64, ptr %p, i64 %offset0
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reames wrote:
> OT - This example is sort of interesting as the optimal lowering for it probably uses a predicated add, not an interleave at all.  Most of your examples fall into this bucket.  Doesn't mean we shouldn't do the interleave work, just an observation.  Maybe something for the future if we see these patterns in real code?
Good catch. The adds were sprinkled in so I could pipe this into `llc` and see what code it generates without worrying about DCE.


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  https://reviews.llvm.org/D145697/new/

https://reviews.llvm.org/D145697