[PATCH] D145697: [RISCV][NFC] Add tests for interleaved accesses in loop vectorizer

[Philip Reames via Phabricator via llvm-commits]

reames accepted this revision.
reames added a comment.
This revision is now accepted and ready to land.

LGTM



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Comment at: llvm/test/Transforms/LoopVectorize/RISCV/interleaved-accesses-zve32x.ll:32
+
+  %offset0 = shl i64 %i, 1
+  %q0 = getelementptr i64, ptr %p, i64 %offset0
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OT - This example is sort of interesting as the optimal lowering for it probably uses a predicated add, not an interleave at all.  Most of your examples fall into this bucket.  Doesn't mean we shouldn't do the interleave work, just an observation.  Maybe something for the future if we see these patterns in real code?


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