[PATCH] D145488: [CodeGen][AArch64] Generate Pseudo instructions for integer MLA/MAD/MLS/MSB

Wed Mar 8 02:54:21 PST 2023

sushgokh added inline comments.

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Comment at: llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td:407-408
+                            [(add node:$op1, (AArch64mul_p_oneuse node:$pred, node:$op2, node:$op3)),
+                             // add(a, select(mask, mul(b, c), splat(0))) -> mla(a, mask, b, c)
+                             (add node:$op1, (vselect node:$pred, (AArch64mul_p_oneuse (SVEAllActive), node:$op2, node:$op3), (SVEDup0)))]>;
 def AArch64mls_m1 : PatFrags<(ops node:$pred, node:$op1, node:$op2, node:$op3),
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paulwalker-arm wrote:
> The `add(a, select(...` pattern has specific requirements for the result of inactive lanes that matches `AArch64mla_m1`.  Did you mean to move it into `AArch64mla_p`?
The current semantics of add(a, select(...) )  is resulting in 
mla za, p0/m, zn * zm

The patch, even after moving this pattern to AArch64mla_p, should generate the pseudo with same predicate semantics (i.e. p0/m), right? I assume that thats the meaning of FalseLanesUndef. Correct me if wrong.

If this understanding is incorrect,
1. is there any other way to specify multiple patterns with different inactive lane requirements to a single pseudo?

2. One option is define pattern that explicitly maps add(a, select(...) ) to specific pseudo.

3. Other option is let this pattern remain with AArch64mla_m1 rather than AArch64mla_p

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D145488/new/

https://reviews.llvm.org/D145488