[PATCH] D145488: [CodeGen][AArch64] Generate Pseudo instructions for integer MLA/MAD/MLS/MSB

[Paul Walker via Phabricator via llvm-commits]

paulwalker-arm added inline comments.


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Comment at: llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td:407-408
+                            [(add node:$op1, (AArch64mul_p_oneuse node:$pred, node:$op2, node:$op3)),
+                             // add(a, select(mask, mul(b, c), splat(0))) -> mla(a, mask, b, c)
+                             (add node:$op1, (vselect node:$pred, (AArch64mul_p_oneuse (SVEAllActive), node:$op2, node:$op3), (SVEDup0)))]>;
 def AArch64mls_m1 : PatFrags<(ops node:$pred, node:$op1, node:$op2, node:$op3),
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The `add(a, select(...` pattern has specific requirements for the result of inactive lanes that matches `AArch64mla_m1`.  Did you mean to move it into `AArch64mla_p`?


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Comment at: llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td:413-414
+                             [(sub node:$op1, (AArch64mul_p_oneuse node:$pred, node:$op2, node:$op3)),
                               // sub(a, select(mask, mul(b, c), splat(0))) -> mls(a, mask, b, c)
                               (sub node:$op1, (vselect node:$pred, (AArch64mul_p_oneuse (SVEAllActive), node:$op2, node:$op3), (SVEDup0)))]>;
 def AArch64eor3 : PatFrags<(ops node:$op1, node:$op2, node:$op3),
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As above I think the `sub(a, select(...` pattern should remain assigned to AArch64mls_m1.


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Comment at: llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td:494
+
+  defm MLA_ZPZZZ : sve_int_3op_p_mladdsub<AArch64mla_p> ;
+  defm MLS_ZPZZZ : sve_int_3op_p_mladdsub<AArch64mls_p> ;
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Please delete redundant whitespace.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D145488/new/

https://reviews.llvm.org/D145488