[PATCH] D144086: [AArch64] Load into zero vector patterns

[Benoit Jacob via Phabricator via llvm-commits]

Benoit added a comment.

Minimized end-to-end MLIR testcase here: https://github.com/openxla/iree/pull/12556 :

To make this more helpful, here is:

- the LLVM IR output by our MLIR compiler (ie the input to LLVM aarch64 codegen here): https://gist.github.com/bjacob/2ed1bce14ae4d67b4261adee70089e29
- the good generated aarch64 code (before the regression): https://gist.github.com/bjacob/e69201fc4528ea516fc1788cabb597f0
- the bad generated aarch64 code (after the regression): https://gist.github.com/bjacob/e364981e10e878c4b092728fe6e087aa


Repository:
  rG LLVM Github Monorepo

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https://reviews.llvm.org/D144086