[PATCH] D145441: [AMDGPU] Define data layout entries for buffers

[Krzysztof Drewniak via Phabricator via llvm-commits]

krzysz00 added a comment.

@foad I was trying to avoid sending in one mega-patch that has the entire prototype.

As to your comments:

- Why 256-bit alignment? It's the next power of 2, and using an alignment that isn't a power of 2 causes an assertion failure
- Re not being allowed to use address space 8 pointers in the usual LLVM operations, I'd call that a target-specific rule about what address space 8 means. I figure this is something that we can check in some sort of AMDGPU-specific validation
- I changed the fallback address space because the plan is that those intrinsics will be taking address space 8 arguments in the future


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  https://reviews.llvm.org/D145441/new/

https://reviews.llvm.org/D145441