[PATCH] D142998: [SVE][codegen] Add few more tests for MUL followed by ADD/SUB (NFC)
Paul Walker via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Mar 6 12:21:28 PST 2023
paulwalker-arm accepted this revision.
paulwalker-arm added a comment.
This revision is now accepted and ready to land.
A few recommended improvements but otherwise looks good.
================
Comment at: llvm/test/CodeGen/AArch64/sve-int-arith.ll:342
+
+define <vscale x 16 x i8> @mla_i8_test1(<vscale x 16 x i8> %a, <vscale x 16 x i8> %b, <vscale x 16 x i8> %c) {
+; CHECK-LABEL: mla_i8_test1:
----------------
Please name the tests after the expected resulting instruction, so `mad` in this case.
================
Comment at: llvm/test/CodeGen/AArch64/sve-int-arith.ll:526-530
+ %r0 = mul <vscale x 16 x i8> %a, %b
+ %r1 = sub <vscale x 16 x i8> %c, %r0
+ %r2 = sub <vscale x 16 x i8> %r1, %a
+ %r3 = sub <vscale x 16 x i8> %r2, %b
+ ret <vscale x 16 x i8> %r3
----------------
As above, I think this can be just:
```
%prod = mul <vscale x 8 x i16> %b, %c
%res = sub <vscale x 8 x i16> %a, %prod
ret <vscale x 8 x i16> %res
```
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D142998/new/
https://reviews.llvm.org/D142998
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