[PATCH] D145370: [AArch64] Fix N2 SchedModel for arithmetic ops with LSL ≤ 4

[Ricardo Jesus via Phabricator via llvm-commits]

rjj created this revision.
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According to the N2 Software Optimization Guide, arithmetic ops with LSL ≤ 4 have a latency of 1 and use pipeline group I. However, most arithmetic ops were being modelled as having a latency of 2 and using pipeline M. The instructions affected include the "unshifted" versions of ADD/SUB, among others.


https://reviews.llvm.org/D145370

Files:
  llvm/lib/Target/AArch64/AArch64.td
  llvm/lib/Target/AArch64/AArch64SchedNeoverseN2.td
  llvm/lib/Target/AArch64/AArch64SchedPredNeoverse.td
  llvm/test/tools/llvm-mca/AArch64/Neoverse/N2-basic-instructions.s

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