[PATCH] D145299: [X86] Generate better code for std::bit_ceil

Sun Mar 5 11:33:16 PST 2023

nikic added a comment.

In D145299#4169706 <https://reviews.llvm.org/D145299#4169706>, @spatel wrote:

> In D145299#4169702 <https://reviews.llvm.org/D145299#4169702>, @RKSimon wrote:
>
>> What is preventing is from performing this in InstCombine? I don't think this pattern will emerge in SelectionDAG
>
> I haven't found a way to avoid a poison shift in IR without doing a cmp+select or umax yet. I think we're relying on the x86-specific behavior of masking the shift amount to make that part of the logic disappear in this patch.

Well, we could also do what is being proposed here and mask the shift amount: https://alive2.llvm.org/ce/z/FD_9Sh On x86, that happens to be free. I'm not sure this makes sense as an IR canonicalization though.

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