[PATCH] D145113: [DAGCombiner][AArch64] Constant fold ISD::VSCALE if VScaleMin==VScaleMax.

[Craig Topper via Phabricator via llvm-commits]

craig.topper updated this revision to Diff 501893.
craig.topper added a comment.

Move to getVScale


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D145113/new/

https://reviews.llvm.org/D145113

Files:
  llvm/include/llvm/CodeGen/SelectionDAG.h
  llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
  llvm/test/CodeGen/AArch64/insert-subvector-res-legalization.ll
  llvm/test/CodeGen/AArch64/sve-extract-fixed-vector.ll
  llvm/test/CodeGen/AArch64/sve-insert-vector.ll

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