[PATCH] D145129: [X86] Fix undefined access in `matchUnaryPermuteShuffle`
Noah Goldstein via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Mar 1 16:56:31 PST 2023
goldstein.w.n created this revision.
Herald added subscribers: pengfei, hiraditya.
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goldstein.w.n requested review of this revision.
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Move the opcode check on `Shuffle` to after we have already checked
that we found a valid shift instruction (`0 < ShiftAmt`).
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D145129
Files:
llvm/lib/Target/X86/X86ISelLowering.cpp
Index: llvm/lib/Target/X86/X86ISelLowering.cpp
===================================================================
--- llvm/lib/Target/X86/X86ISelLowering.cpp
+++ llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -38829,12 +38829,13 @@
int ShiftAmt =
matchShuffleAsShift(ShuffleVT, Shuffle, MaskScalarSizeInBits, Mask, 0,
Zeroable, Subtarget);
- // Byte shifts can be slower so only match them on second attempt.
- if (Order == 0 &&
- (Shuffle == X86ISD::VSHLDQ || Shuffle == X86ISD::VSRLDQ))
- continue;
if (0 < ShiftAmt && (!ShuffleVT.is512BitVector() || Subtarget.hasBWI() ||
32 <= ShuffleVT.getScalarSizeInBits())) {
+ // Byte shifts can be slower so only match them on second attempt.
+ if (Order == 0 &&
+ (Shuffle == X86ISD::VSHLDQ || Shuffle == X86ISD::VSRLDQ))
+ continue;
+
PermuteImm = (unsigned)ShiftAmt;
return true;
}
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