[PATCH] D140369: [PowerPC] update PPCTTIImpl::supportsTailCallFor() check conditions
Ting Wang via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Feb 28 19:29:55 PST 2023
This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG65f68812d399: [PowerPC] update PPCTTIImpl::supportsTailCallFor() check conditions (authored by tingwang).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D140369/new/
https://reviews.llvm.org/D140369
Files:
llvm/lib/Target/PowerPC/PPCISelLowering.cpp
llvm/lib/Target/PowerPC/PPCISelLowering.h
llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
llvm/test/Transforms/Coroutines/coro-split-musttail-ppc64le.ll
Index: llvm/test/Transforms/Coroutines/coro-split-musttail-ppc64le.ll
===================================================================
--- llvm/test/Transforms/Coroutines/coro-split-musttail-ppc64le.ll
+++ llvm/test/Transforms/Coroutines/coro-split-musttail-ppc64le.ll
@@ -3,7 +3,12 @@
; RUN: -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr9 | FileCheck %s
; RUN: opt < %s -passes='cgscc(coro-split),simplifycfg,early-cse' -S \
; RUN: -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr10 --code-model=medium \
-; RUN: | FileCheck %s --check-prefix=CHECK-PCREL
+; RUN: | FileCheck %s
+; RUN: opt < %s -passes='cgscc(coro-split),simplifycfg,early-cse' -S \
+; RUN: -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr10 --code-model=medium -mattr=+longcall \
+; RUN: | FileCheck %s
+; RUN: opt < %s -passes='cgscc(coro-split),simplifycfg,early-cse' -S \
+; RUN: -mtriple=ppc32-- | FileCheck %s
define void @f() #0 {
entry:
@@ -45,12 +50,6 @@
; CHECK: %[[addr2:.+]] = call ptr @llvm.coro.subfn.addr(ptr null, i8 0)
; CHECK-NEXT: call fastcc void %[[addr2]](ptr null)
-; Verify that ppc target using PC-Relative addressing in the resume part resume call is marked with musttail.
-; CHECK-PCREL-LABEL: @f.resume(
-; CHECK-PCREL: %[[addr2:.+]] = call ptr @llvm.coro.subfn.addr(ptr null, i8 0)
-; CHECK-PCREL-NEXT: musttail call fastcc void %[[addr2]](ptr null)
-; CHECK-PCREL-NEXT: ret void
-
declare token @llvm.coro.id(i32, ptr readnone, ptr nocapture readonly, ptr) #1
declare i1 @llvm.coro.alloc(token) #2
declare i64 @llvm.coro.size.i64() #3
Index: llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
===================================================================
--- llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
+++ llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
@@ -1079,17 +1079,5 @@
}
bool PPCTTIImpl::supportsTailCallFor(const CallBase *CB) const {
- // Subtargets using PC-Relative addressing supported.
- if (ST->isUsingPCRelativeCalls())
- return true;
-
- const Function *Callee = CB->getCalledFunction();
- // Indirect calls and variadic argument functions not supported.
- if (!Callee || Callee->isVarArg())
- return false;
-
- const Function *Caller = CB->getCaller();
- // Support if we can share TOC base.
- return ST->getTargetMachine().shouldAssumeDSOLocal(*Caller->getParent(),
- Callee);
+ return TLI->supportsTailCallFor(CB);
}
Index: llvm/lib/Target/PowerPC/PPCISelLowering.h
===================================================================
--- llvm/lib/Target/PowerPC/PPCISelLowering.h
+++ llvm/lib/Target/PowerPC/PPCISelLowering.h
@@ -1172,6 +1172,7 @@
CCAssignFn *ccAssignFnForCall(CallingConv::ID CC, bool Return,
bool IsVarArg) const;
+ bool supportsTailCallFor(const CallBase *CB) const;
private:
struct ReuseLoadInfo {
Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp
===================================================================
--- llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -5651,6 +5651,27 @@
DAG, InVals);
}
+bool PPCTargetLowering::supportsTailCallFor(const CallBase *CB) const {
+ CallingConv::ID CalleeCC = CB->getCallingConv();
+ const Function *CallerFunc = CB->getCaller();
+ CallingConv::ID CallerCC = CallerFunc->getCallingConv();
+ const Function *CalleeFunc = CB->getCalledFunction();
+ if (!CalleeFunc)
+ return false;
+ const GlobalValue *CalleeGV = dyn_cast<GlobalValue>(CalleeFunc);
+
+ SmallVector<ISD::OutputArg, 2> Outs;
+ SmallVector<ISD::InputArg, 2> Ins;
+
+ GetReturnInfo(CalleeCC, CalleeFunc->getReturnType(),
+ CalleeFunc->getAttributes(), Outs, *this,
+ CalleeFunc->getParent()->getDataLayout());
+
+ return isEligibleForTCO(
+ CalleeGV, CalleeCC, CallerCC, CB, CalleeFunc->isVarArg(), Outs, Ins,
+ false /*IsByValArg*/, CallerFunc, false /*isCalleeExternalSymbol*/);
+}
+
bool PPCTargetLowering::isEligibleForTCO(
const GlobalValue *CalleeGV, CallingConv::ID CalleeCC,
CallingConv::ID CallerCC, const CallBase *CB, bool isVarArg,
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D140369.501359.patch
Type: text/x-patch
Size: 4223 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20230301/ea2a99d1/attachment.bin>
More information about the llvm-commits
mailing list